1. Technical Field
Some embodiments of the present inventive concepts are directed to a memory device, and, more particularly to a method of freely converting a DQ pad organization of a memory device into a desired mode on-the-fly.
2. Discussion of the Related Art
In general, memory cells in a memory device are connected to the outside through DQ pads, that is, input/output pins (I/O pins). The DQ pads are used as an external interface. That is, DQ pads are used for data input and output to and from, respectively, the memory cells. During a write operation, a voltage (for example, high=1, low=0) is applied to a DQ pad, which is converted into an appropriate signal corresponding thereto and stored in the selected memory cell. During a read operation, when the access is complete and the output is enabled (for example, OE is low), the data read from the selected memory cell appears in the DQ pad. When accessing the memory cell array once, the number of data that can be simultaneously input/output to/from the memory cells is the unit number of DQ pads. For example, in a case in which a DRAM has thirty-two DQ pads, the unit numbers of the DQ pads may include, for example, 2, 4, 8, 16, 32, etc. which can be denoted as X2, X4, X8, X16, X32 DQ pad modes, etc., respectively.
When each of the conventional memory devices is released, the unit number of the DQ pads, that is, the DQ pad mode, is set as one. And once the DQ pad mode is set as one, it is fixed definitively. In the conventional memory device, the DQ pad mode cannot be changed to a different DQ pad mode while using the memory device. Therefore, the memory device manufacturer must separately manufacture memory devices for each DQ pad mode, and, as a result, the memory device purchaser also needs to specify the desired DQ pad mode of the memory device at the time of purchasing. Further, if a user needs to use several kinds of DQ pad modes, the user must buy multiple memory devices having the desired DQ pad modes.